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CY8C4014LQS-422ZT 赛普拉斯
CY8C4014LQS-422ZT 赛普拉斯
CY8C4014LQS-422ZT 赛普拉斯
Programmable System-on-Chip (PSoC®)
Programmable System-on-Chip (PSoC®)
General Description
PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an
ARM® Cortex™-M0 CPU, while being AEC-Q100 compliant. It combines programmable and reconfigurable analog and digital blocks
with flexible automatic routing. The PSoC 4000 product family is the smallest member of the PSoC 4 platform architecture. It is a
combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CapSense)
with best-in-class performance, and general-purpose analog. PSoC 4000 products will be fully upward compatible with members of
the PSoC 4 platform for new applications and design needs.
Features Up to 20 Programmable GPIO Pins
32-bit MCU Subsystem ■ 24-pin QFN and 16-pin SOIC packages
■ 16-MHz ARM Cortex-M0 CPU ■ GPIO pins on Ports 0, 1, and 2 can be CapSense or have other
■ Up to 16 KB of flash with Read Accelerator functions
■ Up to 2 KB of SRAM ■ Drive modes, strengths, and slew rates are programmable
Programmable Analog Temperature Ranges
■ Two current DACs (IDACs) for general-purpose or capacitive ■ A Grade: –40 °C to +85 °C
sensing applications ■ S-Grade: –40°C to +105 °C
■ One low-power comparator with internal reference ■ Automotive Electronics Council (AEC) Q100 qualified
Low Power 1.71-V to 5.5-V operation PSoC Creator Design Environment
■ Deep Sleep mode with wake-up on interrupt and I2C address ■ Integrated Development Environment (IDE) provides
detect schematic design entry and build (with analog and digital
Capacitive Sensing automatic routing)
■ Cypress Capacitive Sigma-Delta (CSD) provides best-in-class ■ Applications Programming Interface (API) component for all
signal-to-noise ratio (SNR) and water tolerance fixed-function and programmable peripherals
■ Cypress-supplied software component makes capacitive Industry-Standard Tool Compatibility
sensing design easy ■ After schematic entry, development can be done with
■ Automatic hardware tuning (SmartSense™) ARM-based industry-standard development tools
Serial Communication
■ Multi-master I2C block with the ability to do address matching
during Deep Sleep and generate a wake-up on match
Timing and Pulse-Width Modulation
■ One 16-bit Timer/Counter/Pulse-Width Modulator (TCPWM)
block
■ Center-aligned, Edge, and Pseudo-Random modes
■ Comparator-based triggering of Kill signals for motor drive and
other high-reliability digital logic applications
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 001-92145 Rev. *F Revised June 5, 2017
Automotive PSoC® 4: PSoC 4000
Family Datasheet
Contents
Block Diagram .................................................................. 3 Analog Peripherals .................................................... 14
Functional Description ..................................................... 3 Digital Peripherals ..................................................... 16
Functional Overview ........................................................ 4 Memory ..................................................................... 18
CPU and Memory Subsystem ..................................... 4 System Resources .................................................... 18
System Resources ...................................................... 4 Ordering Information ...................................................... 21
Analog Blocks .............................................................. 5 Part Numbering Conventions .................................... 21
Fixed Function Digital .................................................. 5 Packaging ........................................................................ 23
GPIO ........................................................................... 5 Package Outline Drawings ........................................ 24
Special Function Peripherals ....................................... 5 Acronyms ........................................................................ 26
Pinouts .............................................................................. 6 Document Conventions ................................................. 28
Power ................................................................................. 8 Units of Measure ....................................................... 28
Unregulated External Supply ....................................... 8 Document History Page ................................................. 29
Regulated External Supply .......................................... 8 Sales, Solutions, and Legal Information ...................... 31
Development Support ...................................................... 9 Worldwide Sales and Design Support ....................... 31
Documentation ............................................................ 9 Products .................................................................... 31
Online .......................................................................... 9 PSoC® Solutions ...................................................... 31
Tools ............................................................................ 9 Cypress Developer Community ................................. 31
Electrical Specifications ................................................ 10 Technical Support ..................................................... 31
Absolute Maximum Ratings ....................................... 10
Device Level Specifications ....................................... 11
Document Number: 001-92145 Rev. *F Page 2 of 31
Automotive PSoC® 4: PSoC 4000
Family Datasheet
Block Diagram
CPU Subsystem
PSoC 4000 SWD / TC SPCIF
32-bit Cortex Flash SRAM ROM
M0 16 KB 2 KB 4 KB
16 MHz
AHB- Lite MUL Read Accelerator SRAM Controller ROM Controller
NVIC, IRQMX
System Resources
Lite System Interconnect (Single/Multi Layer AHB)
Power
Sleep Control Peripherals
WIC
POR REF PCLK Peripheral Interconnect (MMIO)
PWRSYS
Clock
Clock Control 2x LP Comparator
WDT
IMO ILO
1x SCB-I2C 1x TCPWM
Reset GPIO (4x ports) CapSense
Reset Control
